AEx: Automated processor exploration #235
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Add the methodology from AEx JSPS paper. Simultaneously upstream other small explorer changes and fix up tests relevant to those.
pjaaskel
requested changes
Jun 30, 2023
| @@ -8,6 +8,13 @@ Notable changes and features | |||
| Now it's possible to optionally give a list of pairs of | |||
| <address-space-name>,<data-start>. | |||
| - Added the same option to generatebits with the same syntax. | |||
| - Automated Processor Exploration | |||
| - Open-sourcing the methodology described in: | |||
| "AEx: Automated High-Level Synthesis of Compiler Programmable Co-Processors" | |||
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Pls add a link to the paper.
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| BusMergeMinimizer tries to optimize a machine's interconnection network by "merging" two buses into one, which then has the connections of both original buses. | ||
| A simulation trace based heuristic decides which buses to merge: the idea is that when buses are seldom active at the same time, they can be merged without hurting performance much. | ||
| There is more information in the paper "Greedy Heuristics for Transport Triggered Architecture Interconnect Exploration". |
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Pls add a link here as well.
| @@ -0,0 +1,361 @@ | |||
| /* | |||
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LGPL v2.1 license should be used here.
| @@ -0,0 +1,670 @@ | |||
| /* | |||
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LGPL v2.1 (also to other source files, not mentioning them separately).
| using namespace TTAMachine; | ||
| using namespace HDB; | ||
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| const int ALLOPERATIONAMCHINE = 0; |
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Also the names should be underscore separated.
| @@ -30,32 +30,36 @@ | |||
| * @note rating: red | |||
| */ | |||
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| #include <vector> | |||
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This file also seems to have the MIT license.
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Let's pull this in for 2.2? |
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Add the methodology from AEx JSPS paper.
Simultaneously upstream other small explorer changes and fix up tests relevant to those.